tiny-cpu
Live visualizer
A small RV32I CPU, built to make the path from instructions to execution understandable.
Explore the idea.
A four-instruction program moving through the five stages, with forwarding where an instruction needs a value still in flight. This is an illustrative schedule, not a trace from the CPU RTL.
Interactive illustration · Simplified model
What it shows.
A five-stage pipeline moves instructions through fetch, decode, execute, memory and writeback.
The sketch illustrates forwarding, which lets an instruction use a result before it is written back.
Four moments in the schedule.
Frames captured from the sketch itself, at the cycles where the pipeline does something interesting.
