tiny-tpu
Live
A real 4×4 systolic array, compiled to WebAssembly. Every cell is a signal from the chip.
Explore the idea.
A 3×3 matrix multiply on a wavefront of cells. A cell multiplies and accumulates when its inputs reach it. This sketch uses a simpler schedule than the RTL, which keeps weights in the cells. The live visualizer runs the real hardware.
Interactive illustration · Simplified model
What it shows.
Verilator turns the SystemVerilog into C++, and Emscripten compiles that into one WebAssembly file of about 161 KB.
The visualizer reads each cell's signals from that module every cycle, so the numbers on screen come from the chip and not from a picture of it.
Inside the live visualizer.
Stills from the recording of the real visualizer, and the visualizer's own controls.



